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Table of contents
1.
Introduction
2.
I2C Communication Protocol
3.
Features
4.
Working Of I2C
4.1.
Start and Stop Conditions 
4.2.
Repeated Start Condition 
4.3.
Read/Write Bit 
4.4.
ACK/NACK Bit 
4.5.
Addressing 
4.6.
I2C Packet Format 
5.
Data Transmission In I2C
6.
Single Master with Multiple Slaves
7.
Multiple Master with Multiple Slaves
8.
Advantages
9.
Disadvantages
10.
Frequently Asked Questions
10.1.
What limits I2C speed?
10.2.
How do you check I2C lines?
10.3.
Can I2C have multiple masters?
11.
Conclusion
Last Updated: Mar 27, 2024

Inter-Integrated Circuit(I2C) Interface

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Introduction

This blog will learn about Inter-integrated circuits, how to work, and their advantages and disadvantages. It is also known as TWI (Two Wired Interface). I squared C, frequently called I2C, stands for the Inter-Integrated Circuit protocol. I2C was invented in 1982 with the aid of Philips Semiconductor, now called NXP. If you know about I2C, it is a good thing; if you do not know, then it is even better; this blog is only and only for you; let’s start.

I2C Communication Protocol

I2C stands for Inter-Integrated Circuit and bus interface connection protocol incorporated into devices for serial communication. Philips Semiconductor initially designed it in 1982. Recently it has been a widely used protocol for short-distance transmission.

It is extensively followed for communication among microcontrollers and sensor arrays, displays, IoT devices, EEPROMs etc.

This is a sort of synchronous serial communication protocol. Data bits are transferred at normal periods set by a reference clock line.

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Features

  • Only two comm standard lines (wires) are required to control any device/IC on the I2C network.
     
  • There is no need for prior settlement on the data transfer rate like in UART communication. So the data switch pace can be adjusted every time required.
     
  • Simple mechanism for validation of data transferred.
     
  • It uses a 7-bit addressing machine to target a particular device/IC at the I2C bus.
     
  • I2C networks are easy to scale. New devices can, without a doubt, be connected to the two widespread I2C bus traces.

Also see, Difference Between Verilog and Vhdl

Working Of I2C

It uses only two two-directional open-drain lines for SDA and SCL data communication. Both these lines are pulled high.

  • Serial Data (SDA) – Transfer of data through this pin.
     
  • Serial Clock (SCL) – Fetches the clock signal.
     

I2C operates in 2 modes –

  • Master mode
     
  • Slave mode
     

All information bits transferred on the SDA line are synchronised by employing an excessive low pulse of each clock on the SCL line.

Source: electrosome

 

According to I2C protocols, the information line can not change when the clock; is excessive. It can trade only when the clock line is low. The two lines are open drains; hence, a pull-up resistor is required to keep the lines excessive for devices on the I2C bus that are active low. The statistics are transmitted in the form of packets which incorporate nine bits. The sequence of these bits is –

  1. Start Condition – 1 bit
     
  2. Slave Address – 8 bit
     
  3. Acknowledge – 1 bit

Start and Stop Conditions 

START and STOP may be generated via preserving the SCL line high and changing the level of SDA. The SDA is changed from excessive to low to develop the START condition while maintaining the SCL high. To generate the STOP condition, SDA goes from low to high while keeping the SCL high, as shown in the figure below.

Source: wiznet

Repeated Start Condition 

Between each start and stop circumstance pair, the bus is considered as busy, and no master can take manage of the bus. If the master tries to start a new transfer and no longer wants to release the bus earlier than beginning the new transfer, it troubles a unique START situation. It is called a REPEATED START situation.

Read/Write Bit 

An excessive Read/Write bit indicates that the master is sending the data to the slave, whereas a low Read/Write bit means that the master is receiving records of information from the slave. 

ACK/NACK Bit 

After every data frame goes along with an ACK/NACK bit, if the data frame is obtained successfully, the ACK bit is despatched to the sender.  

Addressing 

The address frame is the primary frame after the beginning bit. The deal with the slave with which the master sends the master desire to communicate to every slave connected with it. The slave then compares its address with this address and sends ACK.

I2C Packet Format 

In the I2C communique protocol, the records are transmitted in packets. These packets are 9 bits lengthy, out of which the first 8 bits are positioned in the SDA line, and the 9th bit is reserved for ACK/NACK, i.e. Acknowledge or Not Acknowledge by using the receiver. 

“START condition plus address packet plus multiple data packets plus STOP condition together form an entire Data switch”.

Data Transmission In I2C

 The master sends the start circumstances to each related slave via diverting the SDA line from a high voltage level to a low voltage level earlier than switching the SCL line from high to low:

Source: circuitbasics

 

 The master sends each slave the seven or 10-bit address of the slave it desires to communicate with, alongside the read/write bit:

Source: circuitbasics

 

 Each slave compares the address get off from the master to its address. If the address coordinate with, the slave returns an ACK bit with the aid of pulling the SDA line low for one bit. If the lesson from the master does not match the slave’s address, the slave leaves the SDA line excessive.

Source: circuitbasics

 

The master sends or receives the data frame:

Source: circuitbasics

 

After each data frame has been conveyed, the receiving gadget returns any other ACK bit to the sender to acknowledge victorious receipt of the frame:

Source: circuitbasics

 

To stop the data transmission, the master gets off a stop circumstances to the slave employing switching SCL excessive before converting SDA high:

Source: circuitbasics

Single Master with Multiple Slaves

Because I2C uses addressing, more than one slave can be curbed by a single master. With a 7 bit address, 128 (27) precise addresses are available. Using 10-bit addresses is uncommon but offers 1,024 (210) individual lessons. To join more than one slaves to a single master, wire them like this, with 4.7K Ohm pull-up resistors connecting the SDA and SCL lines to Vcc:

Source: circuitbasics

Multiple Master with Multiple Slaves

Multiple masters can be related to a single slave or numerous slaves. The hassle with more than one master inside the same device comes while masters attempt to send or receive facts concurrently over the SDA line. Each master desires to detect if the SDA line is low or excessive before transmitting a message to solve this problem. If the SDA line is down, another master has control of the bus, and the master should wait to send the message. If the SDA line is high, transmitting the statement is safe. To connect a couple of masters to a couple of slaves, use the following diagram, with 4.7K Ohm pull-up resistors joining the SDA and SCL lines to Vcc:

 Source: circuitbasics

Advantages

  • It can be configured in multi-master mode.
     
  • Complexity is reduced because it uses only two bi-directional lines (unlike SPI Communication).
     
  • Cost-efficient.
     
  • It uses ACK/NACK attribute, due to which it has enhanced error handling capabilities.

Disadvantages

  • Slower data transfer rate than SPI
     
  • The size of the data frame is limited to 8 bits.
     
  • More intricated hardware needed to implement than SPI

Frequently Asked Questions

What limits I2C speed?

Speed is one factor that restricts the I2C bus application; a pull-up resistor that sets a logic determines the bus's maximum transfer speed, so the high-speed mode at a 3.4 Mbit/s is introduced.

How do you check I2C lines?

You can begin the testing process by verifying each of the following functions on the I2C bus: START and STOP condition technology. A start condition is generated whilst the serial data (SDA) line switches from high to low voltage, and the serial clock (SCL) line switches from high to low.

Can I2C have multiple masters?

The I2C component is an ideal solution when networking multiple devices on a single board or undersized system. The system can be designed with a single master and multiple slaves, multiple masters, or a combination of masters and slaves.

Conclusion

This blog has extensively discussed I2C topics and their implementation in Arduino software/tools. This article also explains the working of I2C  to view and Data transmission in I2C.

We hope that this blog has helped you enhance your knowledge regarding I2C and if you would like to learn more, check out our articles on reading books and much more.

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