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ASIC Design Engineer

6 - 11 yrs
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Not Disclosed by Recruiter Posted 28 days ago Job Applicants: Less than 10 Job Views: 106

Job Description

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    ASIC design and some experience/ knowledge of verification and simulation on sub-system and/or chip level
    At least 6 years of related experience
    Expert in VHDL/Verilog/System Verilog
    Experience with C/C++, TLM/System c would be added advantage
    Experience in Cadence/Synopsis flow
    Experience in tools like Xilinx ISE, Modelsim, Vivado, Cadence/ Synopsys toolchain
    Experience in various buses, interfaces, processors, memories and controllers, and telecom related.
    Synthesis and Timing analysis for ASIC will be added advantage
    Multi/Many-Core CPU Architecture Knowledge
    Working knowledge on TCL/Python/Perl/etc
    Fluent in English, speaking, and writing

Salary: Not Disclosed by Recruiter

Industry: Semiconductors, Electronics

Functional Area: IT Software - Embedded , EDA , VLSI , ASIC , Chip Design

Role Category:Programming & Design

Role:Database Architect/Designer

Employment Type: Permanent Job, Full Time

Other Keyskills

Desired Candidate Profile

    Work Experience Required 6 TO 12

    Job Location(s) Finland (can keep as Europe also)


UG: Any Graduate - Any Specialization

PG:Any Postgraduate - Any Specialization

Doctorate:Doctorate Not Required

Company Profile:

Swedium Global Services

Swedium Global is a growing System Engineering and Solution Company based in Stockholm (Sweden), provides industry solutions to customers across Europe. Our consulting services help customers with onsite consultants. Customers looking for offshore services, we also have a dedicated software development centers in Wroclaw, Poland and Bangalore, India.
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Job Posted by

Priyanka Reddy Company Recruiter Swedium Global Services Pvt Ltd Bengaluru / Bangalore


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