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ASIC Design Verification Engineer 3 to 8 Yrs - Bangalore

Macropace Technologies hiring for CMMi Level 5 Client
3 - 8 yrs
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Not Disclosed by Recruiter Posted 14 days ago Job Applicants: Less than 10 Job Views: 97

Job Description

 
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    Minimum of 3-10 years of experience in Verification.
    Minimum of 1 year of experience in protocols like PCIE or SATA or USB is added advantage
    Work experience on IP/SOC level verification.
    Proficient knowledge on System Verilog
    Methodology like VMM/OVM/UVM is must.

Salary: Not Disclosed by Recruiter

Industry: Semiconductors / Electronics

Functional Area: Engineering Design , R&D

Role Category:Engineering Design

Role:Senior Design Engineer

Employment Type: Permanent Job, Full Time

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Macropace Technologies

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