Synapse Techno Design is creating opportunity for highly self-motivated & self-directed Managers / Leads / Senior & Project engineers in the field of PHYSICAL DESIGN for our Tier-1 partners for ODC / Turnkey / FPP / T&M projects.
Job Location - BANGALORE / SINGAPORE / TAIWAN
Experience Level: 3 to 12 Years
Skills: - PHYSICAL DESIGN
Block Level P&R / Sub-system Level P&R/ Tile Level P&R.
Experienced in Cadence (EDI) or Synopsys (ICC) and Mentor (Calibre) EDA Tools.
Process node experience to be in the range of 28nm & below (i.e. 28 nm, 16 nm, 10 nm, 7 nm).
Responsible for full chip implementation of complex SoCs (RTL-to-GDSII).
Note - Onsite H1B Opportunity for Engineers having 5+ years in 2019.
Salary: INR No Variable Pay, Best in the Industry
Functional Area: IT Software - Embedded
, Chip Design
Role Category: Programming & Design
Role: Team Lead/Technical Lead
Employment Type: Permanent Job, Full Time