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Lead Physical Design Engineer

5 - 10 yrs
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Best in class benefits offerings Openings: 3 Posted 19 days ago Job Applicants: 66 Job Views: 357

Job Description

 
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    Seeking a highly motivated individual, with expertise in IC design and physical implementation for a group with growth opportunities.
    Responsibilities include floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, signal integrity, physical verification and DFM. The individual will contribute both on the implementation side as well as flow development for a variety of mixed signal IP & Subsystems products and test-chips at 16 nm and below.

    The successful candidate:
    - has solid engineering understanding of the underlying concepts of IC design
    - has intimate knowledge of the full design cycle from RTL to GDSII, including development of timing constraints
    - is an expert with the implementation flows and methodologies for deep sub-micron designs
    - has experience in high performance digital design and CAD, high-speed design, low-power design, high speed clock design and distribution.
    - has proven experience contributing to project tape-outs.
    - has experience in timing closure, signal integrity.
    - has good software and scripting skills (Perl, Tcl, Python); knowledge of CAD automation methods.
    - Can contribute to enhancing the best practices of the physical design flow
    - Can interface with the larger product team to understand design constraints, deliverable formats, customer requirements
    - Independent, timely decision maker and able to cope with interrupts
    - Must possess knowledge of IC Compiler and IC Compiler II is preferred
    - Knowledge of IP Subsystem implementation is an added advantage.

    BS with 8+ years experience or MS with 5+ years experience. Must have hands-on experience with design of complex ASSP and COT designs. Must also demonstrate knowledge of the Synopsys tools, flows and methodologies required to execute physical design projects. These tools may include: Design Compiler, Physical Compiler, Primetime SI, ICC/ICC2, Star-RCXT, PrimeRail, Hercules/ICV and other tools.

Salary: Best in class benefits offerings

Industry: Semiconductors / Electronics

Functional Area: IT Software - Embedded , EDA , VLSI , ASIC , Chip Design

Role Category:Programming & Design

Role:Team Lead/Technical Lead

Employment Type: Permanent Job, Full Time

Keyskills

timing closure primetime ic design physical verification rtl gds tape - out synthesis clock tree clock time finfet floor planning place & route sta netlist PNR p&r

Desired Candidate Profile

    Please refer to the Job description above

Education-

UG: B.Tech/B.E. - Any Specialization

PG:M.Tech - Any Specialization

Doctorate:Any Doctorate - Any Specialization

Company Profile:

Synopsys

Synopsys, Inc. (Nasdaq:SNPS) is a world leader in delivering semiconductor design software, intellectual property (IP), design for manufacturing (DFM) solutions and professional services that companies use to design systems-on-chips (SoCs) and electronic systems. The company?s products enable semiconductor, computer, communications, consumer electronics and other companies that develop electronic products to improve performance, increase productivity and achieve predictable success from systems to silicon.
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Job Posted by

Shalu Sisodia Company Recruiter Synopsys India Pvt. Ltd

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