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Senior Technical Leader PD, Physical Design Engineer

5 - 10 Years

Bengaluru, Chennai, Coimbatore

Not Disclosed by Recruiter

Openings: 1Posted: 47 days agoJob Applicants: 36Job Views: 427
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Job Description

Roles and responsibilities 

Hi All,

We are looking for physical design Engineers at ALTRAN.

Job Responsibility
Chip level floorplanning, partitioning, timing budget generation, powerplanning, top PnR, CTS, block integration and ECO generation.
Block level implementation from netlist to GDS
Handling timing closure of high frequency blocks
Handling blocks of high instance counts 1M instance and above
Expertise in signoff closure Timing with SI and OCV, Power,IR and Physical Verification at both block and chip level
Understanding constraints and fixing techniques
Understanding SI prevention , fixing methodology and implementation
Proficient in layout edit techniques
Proficient in Synopsys ICC or Mentor Olympus and Atoptech tool set.
Experience in Design Automation and UNIX system.
Experience in Tcl/Tk, PERL is a plus.

Desired Skills & Experience:
Experience in handling block/chip level implementation from Netlist to GDS
Must possess hands on experience in timing closure and physical verification closure
Must have handled blocks of sizes 1M instances and above at frequencies higher than 1GHz
Experience in handling lower tech nodes that include 40nm,28nm,etc
Must have hands on tapeout experience in lower tech nodes in any of the tools mentioned such ICC or SOC Encounter.
Must have the ability to think on the spot for quick solutions and work-around at the time of tapeout to hit the schedule on time
Must possess excellent scripting skills TCL or Perl
Experience in Synthesis and Formal is a plus
Excellent verbal and written communication skills are required.
Must possess excellent debug skills, analytical skills and the ability to work independently.
Must be highly motivated and possess excellent team spirit

Kindly revert if interested.

Salary: Not Disclosed by Recruiter
Industry: IT-Software / Software Services
Functional Area: IT Software - System Programming
Role Category: Programming & Design
Role: Team Lead/Technical Lead
Employment Type: Permanent Job, Full Time

Desired Candidate Profile

Education:UG -B.Tech/B.E. - Any Specialization
PG - M.Tech - Any Specialization
Doctorate - Doctorate Not Required

Company Profile

Aricent Technologies (H) Limited
Aricent is the world’s #1 pure-play product engineering services and software firm. The company has 20-plus years experience co-creating ambitious products with the leading networking, telecom, software, semiconductor, Internet and industrial companies. The firm's 10,000-plus engineers focus exclusively on software-powered innovation for the connected world.

Based in San Francisco, frog, the global leader in innovation and design, is part of Aricent. The company’s key investors are Kohlberg Kravis Roberts & Co. and Sequoia Capital.
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Contact Details

Recruiter Name:HR

Contact Company:Aricent Technologies (H) Limited

Reference Id:49187

Walkin Interview

15 Jul - 17 Jul 10 AM

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