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Physical Design Engineer Jobs
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physical design, CTS, Finfet, Cadence Encounter, LVS, ICC, ICC2, STARXT...
Asic Physical Design
Process node experience to be in the range of 40nm,below (i. e. 28 nm,16 nm,10 nm,7nm)|Skill : Physical Design Experience : 3- 9 Yrs Location : ...
Infinity HR Consulting Services 10-16 yrs Bengaluru
STA, Physical Verification, Floor Planning, Shell Scripting, PnR, TCP / IP,...
Skills : - Expertise in Physical Design activities: Floor-planning,CTS,P,R - Expertise in Physical Verification - Expertise with Physical Design, ...
SeviTech Systems Pvt Ltd 3.9(7 reviews) 5-10 yrs Bengaluru
STA, LVS, ICC, Routing, Congestion, Netlist, block level...
Qualification - BTech /MTech ...
synthesis, sta, physical design, physical synthesis, iccompiler...
Delivery QC,DFT,RTL,DV Work in advanced technology nodes as listed above at GHz speeds required developing deep technical knowledge in one or ...
Infinity HR Consulting Services 10-18 yrs Hyderabad
Floor Planning, Physical Design, DRC / LVS, Verification, ASIC...
Should be able to handle PnR tasks with minimal supervision - Bachelor / Master Degree in Electronics Engineering Desired Skills : 1 ...
Karv Hr 5-10 yrs Bengaluru
EDA, Synthesis, Floor Planning, PnR, SoC, Physical Design Engineer...
: - Hands on experience with Implementation (PnR,Signoff) of multimillion gate SoC designs in cutting edge process technologies (40nm,28nm,16nm ...
SeviTech Systems Pvt Ltd 3.9(7 reviews) 5-10 yrs Bengaluru
SDR, STA, SPIs, perl scripting, VLSI, USBFS, DDR1 / 2 / 3, JTAG...
Hands-on experience of working on technology nodes like 28nm,20nm,14nm,10nm - Good knowledge of EDA tools from RC,DC,PT,PTSI - Experience in ...
Infinity HR Consulting Services 5-10 yrs Bengaluru
VHDL, FPGA Design, C, FPGA, Board Design, Verilog, RF Design...
Keep a tab on the developments in the technology and industry Specific Knowledge / Skills: - Strong experience with RF/ SDR digital front end ...
Macropace Technologies 4.2(6 reviews) 5-9 yrs Bengaluru
STA, Timing closure, Physical verification, Manager Technology, CMMI...
Candidate should independently able to close STA timing across all corners and modes for blocks and should be able to generate ECO ...
Macropace Technologies 4.2(6 reviews) 5-9 yrs Hyderabad
STA, Timing closure, Physical verification, Manager Technology, CMMI...
Should execute block level floor planning,PG Planning,partitioning,placement,scan-chain-reordering,clock tree synthesis,timing optimization,SI ...
Macropace Technologies 4.2(6 reviews) 2-5 yrs Bengaluru
ASIC, Timing closure, Front end, static timing analysis...
Should have worked on 28nm or lower node designs|Extensive experience and detailed knowledge in Cadence or Synopsys physical Design ...
sta, physical design, floorplanning, mentor calibre, icc, cadence encounter...
Job Location - Bangalore / Hyderabad / Ahmedabad / Malaysia / Singapore Experience Level: 4 to 9 Years Skills: - PHYSICAL DESIGN Block Level P,R ...
Infinity HR Consulting Services 5-8 yrs Bengaluru
Circuit Design, DRC, LVS, Physical Design, Verification, DFM, LITHO
Minimum 5 years experience with at least one year working on 20nm and below| Hands on experience in physical design verification(pdv) at chip ...
Infinity HR Consulting Services 7-12 yrs Bengaluru
Synthesis, EDA, Timing Closure, CAD, Signal Integrity...
Must be able to negotiate with cross-functional teams for convergence|Skills,Qualification : - Must have minimum Bachelors degree in EE from a ...
SeviTech Systems Pvt Ltd 3.9(7 reviews) 5-10 yrs Bengaluru
C, LVS, ICC, Physical Verification Engineer, Perl, block level...
Qualification - BTech /MTech ...
Process design, Automation, Product engineering, process integration...
Essential Responsibilities: Engage with Technology Development,Process Integration,Metrology,Photolithography,Characterization,Data Preparation,D ...
vlsi, eda tools, asic, chip design, synopsys, physical design, p&r, cadence...
Job Location - BANGALORE Experience Level: 3 to 8 Years Skills: - PHYSICAL DESIGN Block Level P,R / Sub-system Level P,R/ Tile Level P,R. ...
Core Edge Solutions 3-8 yrs Bengaluru
Analog Layout, Mixed Signal, Circuit Design, SERDES, Physical Design...
Data Converter Circuits including,Pipelined ADCs,Flash ADCs,Successive Approximation (SAR) register based ADCs,Sigma-Delta ADCs,Delta-Sigma ...
Primetime, Physical Verification, Floor Planning, Timing Closure...
Years of experience to lead and manage a team of physical design engineers with expertise on Partitioning,IO ring preparation,Floor planning,PG ...
Sivalley Technologies Private Limited 0-0 yrs Bengaluru, Hyderabad
ic compiler, synthesis, sta, physical design, cts, floorplanning...
Infinity HR Consulting Services 15-21 yrs Bengaluru
IP Design, ASIC, Circuit Design, DDR, SERDES, FinFET, Physical Design
Role : Director- PHY Engineer Exp : 15+ years Qualification : Bachelors / Masters Degree in Engineering Technology Certifications : - Play a ...
Unix, Computer science, Hardware engineering, Simulation, Analog, Perl...
Hands on experience on Analog circuit simulation, using spice simulators.Should be able to generate test vectors.Very good understanding of the ...
Sivalley Technologies Private Limited 2-7 yrs Bengaluru
Physical Design, PNR, Synthesis, Design Engineering, Netlist to GDSII, Sign...
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Qusol Consultancy 8-12 yrs Bengaluru, Pune
PPA, ASIC, Timing closure, Email, VLSI, Architecture, Layout, Notes...
com Only 19 per cent engineering graduates in India are employable|Only 5 per cent graduates from other streams are fit for employment,says a ...
SPICAWORKS INDIA PRIVATE LIMITED 3-8 yrs Delhi NCR, Bengaluru
ic compiler, STA, static timing analysis, place & pnr, ICC, LVS...
Strong in digital logic design,CMOS,strong analytical ability Proficient in P,R from RTL to GDS including timing closure,Physical verification ...
Computer science, STA, Timing closure, Hardware engineering...
You will be part of Independent planning and execution of Netlist-to-GDSII . You will work on design flows like floorplanning , placement , ...
PNR, Timing Closure, Physical Design, STA, DRC, Floor Planning...
Aelfric Solutions 2-7 yrs Hyderabad
PNR, Timing Closure, Physical Design, DRC, LVS, STA, Physical Verification,...
Should have good exposure to high frequency design convergence and exposure to physical design methodology| Well versed with the level timing ...
SeviTech Systems Pvt Ltd 3.9(7 reviews) 5-10 yrs Bengaluru
STA, Physical Verification, DRC, Floor Planning, PNR, Placement, LVS, ICC...
- Hands-on experience on technology nodes like 28nm, 20nm, 14nm, 10nm;- Hands-on experience in block/top level signoff STA, physical ...
Infinity HR Consulting Services 10-15 yrs Bengaluru
STA, Physical Verification, DRC, Floor Planning, Timing Closure, PNR...
Critical Hiring for Bangalore/Delhi NCR Product based Organization. Location: Bangalore Experience: 2+yrs Job ...
Infinity HR Consulting Services 2-7 yrs Bengaluru
STA, Physical Verification, DRC, Floor Planning, Timing Closure, PNR...
Critical Hiring for Bangalore/Delhi NCR Product based Organization. Location: Bangalore Experience: 2+yrs Job ...
SeviTech Systems Pvt Ltd 3.9(7 reviews) 10-15 yrs Noida
sta, routing, physical design, gds ii, perl scripting, CTS, netlist...
Desired Skills and Experience : - Experience in Physical Design - Handled Netlist to GDS II at block level for multiple tape outs - Hands-on ...
SeviTech Systems Pvt Ltd 3.9(7 reviews) 3-8 yrs Noida
STA, routing, perl scripting, CTS, Physical Design Engineer, GDS II...
Desired Skills and Experience : - Experience in Physical Design - Handled Netlist to GDS II at block level for multiple tape outs - Hands-on ...
SPICAWORKS INDIA PRIVATE LIMITED 5-10 yrs Bengaluru, Delhi NCR
Analytical Ability, ICC, LVS, Perl, place & route, Logic Design, CMOS...
Strong in digital logic design,CMOS,strong analytical ability Proficient in P,R from RTL to GDS including timing closure,Physical verification ...
First Employer 3-5 yrs Bengaluru
Netlistblock, STA, ICC Routing, LVS, ICC, Routing, Congestion...
Qualification: Education: BE / BTech | MS/ MTech ...
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MediaTek Bangalore Private Limited 5-10 yrs Bengaluru
STA, Physical Verification, DRC, LVS, Design Engineering, Cadence, Physical...
5+ years of hands on experience in physical design of high performance design with frequencies ...
synthesis, routing, asic, design analysis, physical design, rdl routing...
Experience in Taping out Flip-Chip designs will be an added advantage - Strong written and verbal communication skills - Strong analytical ...
Infinity HR Consulting Services 2-7 yrs Bengaluru
Physical Design, Floor Planning, Synthesis, RTL, Verification, Synopsys...
Should have worked on 28 nm ...
Cambio Consulting India Pvt Ltd 6-11 yrs Bengaluru, Hyderabad, Ahmedabad
sta, routing, physical design, floor planning, Netlist to GDS II, placement...
Handled Netlist to GDS II at Chip / block level for multiple tape outs Hands-on experience on technology nodes like 28nm,16nm and below Good ...
Amisign Technologies 10-20 yrs Bengaluru
DEO / CDO, STA, Floor Planning, PnR, Timing Closure, CAD, FinFET...
- Experience with double pattern finfet required, experience with triple pattern process nodes a plus;Education : MSEE 8+ years experience or ...
Amisign Technologies 10-15 yrs Bengaluru
STA, Synthesis, Physical Verification, Floor Planning, Timing Closure...
- 2- 11 years of experience in digital implementation;- Experience with 28nm and/or 16nm digital implementation and physical validation ...
Confidential 3-8 yrs Ahmedabad, Bengaluru
STA, Physical Verification, EDA, Floor Planning, Timing Closure, GDS...
- Should be able to provide clear directions to the team wrt PNR issues Drive methodology with help of local and external CAD/EDA teams for ...
Sivalley Technologies Private Limited 1-3 yrs Bengaluru
Netlist to GDSII, Sign - off flow, Synthesis, PNR, Design Engineering...
SeviTech Systems Pvt Ltd 3.9(7 reviews) 5-10 yrs Bengaluru
perl scripting, CTS, VLSI, GDS II, ICC, Nanoroute, Netlist, Calibre...
Desired Skills and Experience: - Experience in Physical Design - Handled Netlist to GDS II at block level for multiple tape outs - Hands-on ...
Asic Physical Design
Skill : Physical Design Experience : 3- 10 Yrs Location : Ahmadabad / Bangalore / Singapore / Malaysia * Block Level P,R / Sub-system Level P,R/ ...
Resource Weaver 6-10 yrs Hyderabad
STA, ASIC, DFT, script programming, design methodologies, SOC...
6 - 10 years of experience in Phsyical Design Responsible for Constraints generation at IP level and Top Level,IP Level Synthesis,Full chip ...
STA, Formal Verification, ASIC Synthesis, EDA, perl scripting, Synthesis...
Hands-on experience of working on technology nodes like 28nm,20nm,14nm,10nm Ability to understand advanced digital design architectures and ...
Infinity HR Consulting Services 8-13 yrs Bengaluru
Synthesis, Floor Planning, FPGA, Physical Design, Verification, RTL...
Should have worked on 28 nm ...
BHRS Consulting 3-7 yrs Bengaluru, Chennai, Hyderabad
Physical Design, PnR, RTL, ASIC, VLSI, Floor Planning, DRC / LVS, Primetime...
- Netlist to GDSII / PD / Implementation flow / PnR / APR - RTL to GDSII (Candidate has Synthesis and PD experience) - Low power design ...
Faststream Technologies Private limited 0-5 yrs Bengaluru
STA, Physical Verification, DRC, Floor Planning, PNR, Placement, LVS, ICC...
- Hands-on experience on technology nodes like 28nm, 20nm, 14nm, 10nm;- Hands-on experience in block/top level signoff STA, physical ...
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