Design Engineer

Role:
SOC design engineer working in the area of micro architecture, logic design, RTL coding, verification, supporting validation/software, silicon implementation support activities (ex: synthesis, timing, DFT, p&r)


3+ years of hands-on experience with SoC design
• experience with MCU and APU class processors
• experience with AXI/AHB or other standard on-chip buses
• Good knowledge of processor based SoC architecture
• Excellent debugging skills
• Broad understanding of RTL-to-Tapeout methodology
• Prior experience with pre and post silicon debug

• Prior experience with QSPI, PSRAM, low power implementations
• Hands-on experience with Synthesis and Logic Equivalency checking
• Hands-on experience with FPGA debug
• Experience with Verilog/PSL/OVA assertions

• BTech/MTech in EE or equivalent with 3-7 years of experience

Keyskills