Dft, ASIC, RTL design and verification


0 to 5 yrs. Bengaluru / Bangalore , Chennai
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Posted on 16 Sep 2018

Job Description

DFT Engineer:
1-10 year experience with Skill set : Scan insertion with Test Compression, ATPG for stuck-at and Transition faults, MBIST insertion, Memory Repair implementation and Pattern Validation, IJTAG, Boundary Scan

Design and Verification Engineer:
1-5 year experience with Skill set: Logic Desgin, RTL coding, Synthesis, Timing Check, System Verilog, UVM and scripting language.

Link to Job: http://ramictech.com/carrers-2/


Job Posted by

Ramkumar Director RAMIC TECHNOLOGY PVT LTD Bengaluru / Bangalore


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