STA Lead

SmartPlay Technologies Pvt. Ltd

7 to 12 yrs. Bengaluru / Bangalore
Apply without registration
Posted on 24 Jul 2015

Job Description

• Experience in synthesis of complex SoCs block/top level and writing timing constraints
• Experience in formal verification RTL-to-netlist and netlist-to-netlist with DFT constraints
• Experience in post-layout STA closure and timing ECOs
• Worked in technology nodes 45nm and below
• Knowledge of low-power aware implementation is a plus
• Tools: RTL Compiler, LEC, CLP, ETS/PTSI/GT


Job Posted by

Ramya Lakshmi Manager HR Talent Acquisition SmartPlay Technologies Pvt. Ltd Bengaluru / Bangalore


IEIL has taken all reasonable steps to ensure that information on this site is authentic. Applicants are advised to research bonafides of advertisers independently. IEIL shall not have any responsibility in this regard. We also recommend that you visit Security Guidelines and Terms and Conditions for more comprehensive information on this aspect.