Senior Verification Engineer

Atria logic pvt ltd

5 to 8 yrs. Bengaluru / Bangalore

Posted on 30 Jan 2018

Job Description

. Create various verification components in SystemVerilog and using related methodology guidelines
· Build/Develop Verification Testbench for new IP/Products by leveraging existing test benches, methodologies and industry best known practices
· Develop Test plans and test-cases/test-sequences
· Handle block/Module/IP level verification independently.
· Debug issues and present / discuss problems with designers independently
· Run regression, analysis reports, achieve code coverage and functional coverage goals
. Good expertise in Network Storage domain – one or more among NVMe, RDMA, 10/25G, Ethernet, PCIe

Keyskills

System Verilog Regression Analysis pcie ethernet networking verification ip c c++ pyt unix shell scripting uvm verilog Rtl Coding Asic Verification

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bindu HR Executive ATRIA LOGIC pvt ltd Bengaluru / Bangalore

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