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Gopinath Anjinappa-[Hiring-Physical Design /RTL Design /CAD /Verification /Post Silicon Validation /DFT/STA /Physical verification][Onsite/Offsite] [Linkedin : https://in.linkedin.com/pub /gopinath-anjinappa/97/868/b63 ]
CDC , Linting , synthesis , RTL , Micro Architecture , Functional Verification , spyglass , VHDL , Verilog , soc
Mirafra Technologies
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