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Timing Closure Jobs in Hyderabad-secunderabad

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Macropace Technologies 5-10 yrs Hyderabad
DRC, Physical Design, Timing Closure, Primetime, Floor Planning...
Experience on top-level floor planning, PG planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, ...
Not disclosed
Posted by Macropace Technolgoies , 3 days ago
ThinCI Semiconductor Technologies India Pvt. Ltd. 4-8 yrs Hyderabad
Engineer - DFT, DFT, FastScan, TestKompress, MBIST, JTAG, P1500, Spyglass...
4 8 years working experience in DFT design;Experience of completing multiple tape outs and exposure to chip bring-up;Experience working with ...
Not disclosed
Posted by HR , 30+ days ago
SoCtronics Technologies Pvt. Ltd. 3-7 yrs Hyderabad
CAD, DFT, USB, SOC, Budgeting, Timing closure, formal verification, STA...
Not disclosed
Posted 30+ days ago
First Pass Semiconductors Pvt Ltd 3-5 yrs Hyderabad
Design Engineer, Perl, ASIC, Physical design, PCIE, Front end...
Not disclosed
Posted 30+ days ago
Aelfric Solutions 2-7 yrs Hyderabad
PNR, Timing Closure, Physical Design, DRC, LVS, STA, Physical Verification,...
- Should have good exposure to high frequency design convergence and exposure to physical design methodology;- Well versed with the level timing ...
Not disclosed
Posted by HR , 30+ days ago
Micron Semiconductor Asia Pte Ltd 4-8 yrs Hyderabad
DFT, Digital Design, Timing Closure, Perl, Analog Design, IC Design...
Experience with physical design methodologies and TCL/perl/python scripting is required;Tech with 4-8 years IC design experience specifically ...
Not disclosed
Posted by HR , 30+ days ago
Vhunt4U 4-9 yrs Hyderabad, Bengaluru, Noida, Malaysia, Singapore
DRC, Timing Closure, Primetime, Floor Planning, Static Timing Analysis...
" Experience on top-level floor planning, PG planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, ...
Not disclosed
Posted by HR , 30+ days ago
Hyrefox Consultants Private Limited 3-8 yrs Hyderabad
Floorplan, Physical Design, Synthesis, Design Engineering, Timing closure...
Preferably experience in 20 nm, 14 nm flows;Experience of UPF low power design through synthesis, place and ...
Not disclosed
Posted 30+ days ago
Qualcomm india pvt ltd. 4.2(90 reviews) 2-5 yrs Hyderabad
Physical design, SOC, Timing closure, Manager Technology, STA
As a Timing Engineer, you will play a vital role in Timing analysis targeting the Mobile and IOT markets.The candidate will work with best in ...
Not disclosed
Posted 30+ days ago
Orange Semiconductors Pvt Ltd 3-8 yrs Hyderabad
Physical design, Physical verification, IPS, Timing closure, Floor planning...
Not disclosed
Posted 30+ days ago
Advanced Micro Devices, Inc. 3.9(12 reviews) 6-11 yrs Hyderabad
Verilog, Physical design, Graphics, DFT, Gaming, X86, Timing closure...
Not disclosed
Posted 30+ days ago
BANGALORE SEMICONDUCTOR SERVICES PVT. LTD. 2-6 yrs Hyderabad, Bengaluru
Physical design, Member Technical Staff, Senior Design Engineer, Macros...
Not disclosed
Posted 30+ days ago
ONS Search 2-5 yrs Hyderabad, Bengaluru, Pune, Noida
Physical design, Signal integrity, Physical verification, Timing closure...
Not disclosed
Posted 30+ days ago
Qualcomm india pvt ltd. 4.2(90 reviews) 2-5 yrs Hyderabad
Physical design, Floor planning, Physical verification, Computer science...
Not disclosed
Posted 30+ days ago
Success Booster 4-8 yrs Hyderabad, Bengaluru
Timing Closure, Physical Design, Floor Planning, Physical Verification, STA...
Physical design implementation (Floorplanning, CTS, and/or STA) in advanced technologies STA tool and timing closure methodologies ...
Not disclosed
Posted by Recruiter , 30+ days ago
Innovium 8-12 yrs Hyderabad
Engineering Manager, Perl, Physical design, Physical verification...
Not disclosed
Posted 30+ days ago
Advanced Micro Devices, Inc. 3.9(12 reviews) 2-7 yrs Hyderabad
Perl, Physical design, Graphics, SOC, DFT, Gaming, Front end, Budgeting...
Not disclosed
Posted 29 days ago
Cambio Consulting India Pvt Ltd 3-8 yrs Delhi NCR, Bengaluru, Hyderabad, Pune
timing closure, physical design, primetime, sta, floor planning...
Experience with floor planning tools, P&R flows and physical design verification flows is required;Experience solving SoC issues such as ESD ...
INR 2,25,000 - 7,25,000 P.A.
Posted by Boya jhansi , 24 days ago
Imagination Technologies India Private Ltd. 8-10 yrs Hyderabad
Hardware Design Engineer, RTL, ASIC Synthesis, CDC, FPGA, Viterbi, Demapper...
Experience of handing multiple clock domain designs;Experience in architecting complex signal processing blocks;Excellent Digital design skills ...
Not disclosed
Posted by HR , 6 days ago
SoCtronics Technologies Pvt. Ltd. 3-8 yrs Hyderabad
fpga, development, pcb design, , signal integrity, jtag, characterization...
Not disclosed
Posted 30+ days ago
Techs to Suit Inc 4-9 yrs Bengaluru, Hyderabad, Pune
DRC, Timing Closure, Physical Design, Floor Planning, LVS, Placement
Should have Played significant role in multiple tape-outs across 90-14/7nm designs complex block implementation;Experience in Physical Design ...
INR 15,00,000 - 25,00,000 P.A.
Posted by SHAILENDRA , 14 days ago
Advanced Micro Devices, Inc. 3.9(12 reviews) 4-9 yrs Hyderabad
Perl, Physical design, Graphics, SOC, DFT, Gaming, Budgeting, Backend...
Not disclosed
Posted 29 days ago
Vhunt4U 10-15 yrs Bengaluru, Hyderabad, Pune, Noida, Malaysia, Singapore
DRC, Timing Closure, Primetime, Floor Planning, Static Timing Analysis...
Experience on top-level floor planning, PG planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, ...
Not disclosed
Posted by HR , 14 days ago
Career Network 4-9 yrs Bengaluru, Hyderabad, Pune, Kochi, Noida
Timing Closure, Physical Design, DRC, LVS, Placement, Floor Planning...
Should have Played significant role in multiple tape-outs across 90-14/7nm designs complex;Experience in Physical Design implementation ...
Not disclosed
Posted by Kajal V , 17 days ago

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MosChip Semiconductor Technology Ltd 3-8 yrs Hyderabad, Bengaluru
Physical design, Physical verification, IPS, Timing closure, Floor planning...
Not disclosed
Posted 30+ days ago
Advanced Micro Devices, Inc. 3.9(12 reviews) 12-15 yrs Hyderabad
Technical Lead, Perl, Graphics, SOC, VLSI, Gaming, Timing closure...
Not disclosed
Posted 30+ days ago
Vhunt4U 3-8 yrs Bengaluru, Hyderabad, Pune, Noida, Kochi, Malaysia, Singapore
DRC, Timing Closure, Primetime, Floor Planning, Static Timing Analysis...
Experience on top-level floor planning, PG planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, ...
Not disclosed
Posted by HR , 14 days ago
Xilinx India Pvt Ltd 4.8(13 reviews) 7-12 yrs Hyderabad
SoC Design, RTL, Primetime, STA analysis, Ethernet, ONFI 3.1 NAND...
Can write sdc/tcl for DC/Primetime(PT) tool for STA analysis, should be able to create synthesis constraints based on design requirements;Have ...
Not disclosed
Posted by Shalini Recharla , 30+ days ago
Advanced Micro Devices, Inc. 3.9(12 reviews) 6-11 yrs Hyderabad
Engineering Manager, Perl, Physical design, Graphics, SOC, DFT, Gaming...
Not disclosed
Posted 30+ days ago
Innovium 3-5 yrs Hyderabad
Engineering Manager, Perl, Physical design, Physical verification...
Not disclosed
Posted 30+ days ago
ThinCI Semiconductor Technologies India Pvt. Ltd. 8-13 yrs Hyderabad
DFT, DFT verification, SCAN, Boundary SCAN, MBIST, LSBIST...
Experience of completing multiple tape outs and exposure to chip bring-up;8+ years working experience in DFT design or DFT verification field ...
Not disclosed
Posted by HR , 30+ days ago
Invecas technologies Pvt Ltd 4-9 yrs Hyderabad
Emulation, veloce
Experience with test bench creation, simulation and verification based on third party UVM/OVM IP;Should have worked on board level debugging, ...
INR 10,00,000 - 20,00,000 P.A.
Posted by Sai Supraja Sankara , 30+ days ago
Advanced Micro Devices, Inc. 3.9(12 reviews) 5-9 yrs Hyderabad
Engineering Manager, Perl, Physical design, Graphics, SOC, DFT, Gaming...
Not disclosed
Posted 30+ days ago
Vhunt4U 10-15 yrs Hyderabad, Bengaluru, Noida, Malaysia, Singapore
DRC, Timing Closure, Primetime, Floor Planning, Static Timing Analysis...
" Experience on top-level floor planning, PG planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, ...
Not disclosed
Posted by HR , 30+ days ago
Eximius Design 4.3(8 reviews) 2-7 yrs Hyderabad
SAN, Semiconductor, Timing closure, silicon validation, STA, level...
Not disclosed
Posted 30+ days ago
SASIC Technologies 4-8 yrs Hyderabad, Bengaluru
FPGA, VHDL, ASIC, Verilog, Digital design, Coding, Xilinx, Timing closure...
Not disclosed
Posted 30+ days ago

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Sivaltech Pvt. Ltd 3-5 yrs Hyderabad, Bengaluru
Perl, SAN, System verilog, DFT, Computer science, static timing analysis...
Not disclosed
Posted 30+ days ago
Cambio Consulting India Pvt Ltd 4-9 yrs Bengaluru, Hyderabad
Physical Design, STA, Timing Closure, Placement, Synthesis, Synopsys, DFT...
Previous experience in owning lint,CDC, synthesis, dft for 5+ million instance designs;Experience with timing closure of high speed designs (in ...
INR 6,00,000 - 16,00,000 P.A.
Posted by Shiva Prasad , 30+ days ago
Career Network 9-14 yrs Bengaluru, Hyderabad, Pune, Kochi, Noida
Timing Closure, Physical Design, DRC, LVS, Placement, Floor Planning...
Should have Played significant role in multiple tape-outs across 90-14/7nm designs complex;Experience in Physical Design implementation ...
INR 15,00,000 - 30,00,000 P.A.
Posted by Kajal V , 10 days ago
Intel Technology India Pvt Ltd 4.3(126 reviews) 8-10 yrs Hyderabad
Perl, Troubleshooting, ASIC, Physical design, Debugging, SOC, DFT, Physical...
Not disclosed
Posted 30+ days ago
Sivaltech Pvt. Ltd 4-7 yrs Hyderabad, Bengaluru
Perl, SAN, Physical design, Physical verification, Computer science, Timing...
Not disclosed
Posted 30+ days ago
MAXVY 2-7 yrs Hyderabad, Bengaluru, Chennai, Noida
Tools, Physical design, Perl, SOC, Signal integrity, Physical verification,...
Not disclosed
Posted 30+ days ago
Innovium 10-15 yrs Hyderabad
ASIC, Physical design, DFT, Silicon, Timing closure, Backend, Macros...
Not disclosed
Posted 30+ days ago
Qlog Technologies 5-10 yrs Hyderabad
Perl, Physical design, DFT, Macros, Physical verification, Analog...
Not disclosed
Posted 30+ days ago
Qlog Technologies 2-7 yrs Hyderabad
Layout, Tools, Analog, Physical design, DFT, Perl, Signal integrity...
Not disclosed
Posted 30+ days ago
Hyrefox 3-8 yrs Hyderabad
Physical design, DFT, Physical verification, Software services, Backend...
Not disclosed
Posted 30+ days ago
Micron Semiconductor Asia Pte Ltd 4-8 yrs Hyderabad
STA, Static Timing Analysis, ASIC Synthesis, Physical Design...
Hands-on experience of working on technology nodes like 28nm, 20nm, 14nm,10nm;Good understanding of deep submicron parasitic effects, crosstalk ...
Not disclosed
Posted by HR , 30+ days ago
Advanced Micro Devices, Inc. 3.9(12 reviews) 2-7 yrs Hyderabad
Design Engineer 2, Verilog, Physical design, Graphics, DFT, Gaming, X86...
Not disclosed
Posted 13 days ago
Macropace Technologies 5-9 yrs Hyderabad
Physical design, CMMI, Physical verification, Timing closure, STA...
Not disclosed
Posted 30+ days ago
Macropace Technologies 6-11 yrs Hyderabad
Primetime, Physical Design, STA, Timing Closure, Timing Analysis, TCL, Perl...
Should have worked on 28nm or lower node multi-million gate tape outs;Experience in industry standard tools;Good knowledge in developing and ...
Not disclosed
Posted by Macropace Technolgoies , 3 days ago
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