Senior Physical Design Engineer
Openings: 5Posted: 15 days agoJob Applicants: 19Job Views: 1892+
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Education:UG -BCA in Computers,B.Tech/B.E. in Electronics/Telecommunication, Instrumentation, Computers, Electrical,B.Sc in Computers, Electronics
PG - M.Tech in Electronics/Telecommunication, Instrumentation, Computers, Electrical,MCA in Computers,MS/M.Sc(Science) in Electronics & Embedded Technology, Computers, Electrical Engineering, Electronics,MCM in Computers and Management
Job Description
ROLE & RESPONSIBILITIES
Engineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal integrity, Power grid analysis atc in ASIC PNR Flow
Engineer will be responsible for executing the block level place and route assignments from Netlist through GDS flow
Should be able to do full chip implementation of complex SoCs (RTL-to-GDSII), but it is not must.
To close STA timing across all corners and modes for blocks and should be able to generate ECO independently.
Will be responsible to Work with design teams for closing CTS, IO timing, DFT timing.
Responsible for digital design automation, flow-automation and regression across RTL-to-GDSII.
To ensure successful delivery of his block(s) to customers
ESSENTIAL SKILLS & EXPERIENCE
Minimum Experience required is 5 Years in Physical Design
Strong fundamentals on Physical design including Floorplan, power grid analysis, placement, cts, routing, DRC-LVS closure, timing closure, antenna fixing, signal integrity on 65nm, 45nm, 28nm, 16nm geometry.
Sound expertise in Tcl, Perl, Shell scripting. Technically sound & good team player
Hands-on experience with Place and Route tools (Synopsys - ICC, Cadence – Innovus / Encounter) is a must.
Experience on latest technology (28nm,16nm,7 nm)
EDUCATION BACKGROUND
B.E./ B.S./ B.Tech/ M.S./ M.Tech in VLSI/Electronics/Electrical/Computer/Instrumentation Engineering.
Industry: Electronic Components / Semiconductors
Department: Engineering - Hardware & Networks
Role Category: Hardware
Role: Physical Design / Layout Engineer
Employment Type: Full Time, Permanent
Engineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal integrity, Power grid analysis atc in ASIC PNR Flow
Engineer will be responsible for executing the block level place and route assignments from Netlist through GDS flow
Should be able to do full chip implementation of complex SoCs (RTL-to-GDSII), but it is not must.
To close STA timing across all corners and modes for blocks and should be able to generate ECO independently.
Will be responsible to Work with design teams for closing CTS, IO timing, DFT timing.
Responsible for digital design automation, flow-automation and regression across RTL-to-GDSII.
To ensure successful delivery of his block(s) to customers
ESSENTIAL SKILLS & EXPERIENCE
Minimum Experience required is 5 Years in Physical Design
Strong fundamentals on Physical design including Floorplan, power grid analysis, placement, cts, routing, DRC-LVS closure, timing closure, antenna fixing, signal integrity on 65nm, 45nm, 28nm, 16nm geometry.
Sound expertise in Tcl, Perl, Shell scripting. Technically sound & good team player
Hands-on experience with Place and Route tools (Synopsys - ICC, Cadence – Innovus / Encounter) is a must.
Experience on latest technology (28nm,16nm,7 nm)
EDUCATION BACKGROUND
B.E./ B.S./ B.Tech/ M.S./ M.Tech in VLSI/Electronics/Electrical/Computer/Instrumentation Engineering.
Industry: Electronic Components / Semiconductors
Department: Engineering - Hardware & Networks
Role Category: Hardware
Role: Physical Design / Layout Engineer
Employment Type: Full Time, Permanent
Preferred Keyskills
Other Keyskills
Education:UG -BCA in Computers,B.Tech/B.E. in Electronics/Telecommunication, Instrumentation, Computers, Electrical,B.Sc in Computers, Electronics
PG - M.Tech in Electronics/Telecommunication, Instrumentation, Computers, Electrical,MCA in Computers,MS/M.Sc(Science) in Electronics & Embedded Technology, Computers, Electrical Engineering, Electronics,MCM in Computers and Management
Company Profile
Einfochips
eInfochips, an Arrow company, is a leading global provider of product engineering and semiconductor design services. With over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. The company€™s service offerings include digital transformation and connected IoT solutions across various cloud platforms, including AWS and Azure.
Along with Arrow€™s $27B in revenues, 19,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow€™s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients through Arrow Connect.
Founded in 1994, our work culture is built over years of experience in providing innovative solutions to our clients and our indomitable spirit to excel in all aspects of our engagement. We believe that our success lies upon the skills and quality of our people we work with.
Silicon engineering services: ASIC / FPGA Design & Development, Design Verification & Validation, Physical Design & DFT
Embedded systems engineering services: Hardware Design, System Software, System Verification & Validation, Multimedia
Software engineering services: Cloud Enablement, IoT & Mobility, Application Software, QA and Test Automation, BI and Data Visualization
Extended services: New Product Development, Lifecycle Management, Product Sustenance
IPs: DevOps for IoT, IoT Gateway Framework, IoT Device Lifecycle Management, Video Management Software, Reusable Camera Framework, Test Automation Framework, Reference Designs & EVMs, Verification IPs, OptiX €“ Physical Design Framework
Corporate Video: https://www.youtube.com/watch?v=-Z8u_-8TAkQ
Along with Arrow€™s $27B in revenues, 19,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow€™s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients through Arrow Connect.
Founded in 1994, our work culture is built over years of experience in providing innovative solutions to our clients and our indomitable spirit to excel in all aspects of our engagement. We believe that our success lies upon the skills and quality of our people we work with.
Silicon engineering services: ASIC / FPGA Design & Development, Design Verification & Validation, Physical Design & DFT
Embedded systems engineering services: Hardware Design, System Software, System Verification & Validation, Multimedia
Software engineering services: Cloud Enablement, IoT & Mobility, Application Software, QA and Test Automation, BI and Data Visualization
Extended services: New Product Development, Lifecycle Management, Product Sustenance
IPs: DevOps for IoT, IoT Gateway Framework, IoT Device Lifecycle Management, Video Management Software, Reusable Camera Framework, Test Automation Framework, Reference Designs & EVMs, Verification IPs, OptiX €“ Physical Design Framework
Corporate Video: https://www.youtube.com/watch?v=-Z8u_-8TAkQ
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