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Introduction
Peripherals (Input-Output devices) send interrupts to the CPU for data transfer or communication. It is the responsibility of the interrupt system to notify the source from where the interrupt has been sent. Several peripherals may send requests for interrupts simultaneously. In this situation, the interrupt system performs the job of selecting the device to service first based on priority.
This article covers priority interrupts, their types, and methods to establish the priority of simultaneous interrupts.
What is the priority interrupt in computer architecture?
A priority interrupt is a system that determines the priority at which devices generating interrupt signals simultaneously should be serviced by the CPU first. High-speed transfer devices are generally given high priority, and slow devices have low priority. And, in case of multiple devices sending interrupt signals, the device with high priority gets the service first.
Types of Interrupts
Following are the types of interrupts:
Hardware Interrupt
If interrupt signals are sent by devices connected externally, the interrupt is a hardware interrupt. The following are the types of hardware interrupts:
Maskable Interrupt The hardware interrupt can be postponed when an interrupt with high priority occurs at the exact moment.
Non-Maskable Interrupt This hardware interrupt cannot be postponed and should be processed immediately by the processor.
Software Interrupt
If interrupt signals are caused due to an internal system, the interrupt is known as a software interrupt. Following are the types of software interrupts:
Normal interrupt If interrupt signals are caused due to instructions of software, the interrupt is known as a normal interrupt.
Exception If interrupt signals are caused unexpectedly at the time of execution of any program, the interrupt is an exception. For example, division by zero.
Following are the methods for establishing priority of simultaneous interrupts:-
Daisy Chaining Priority - Hardware Method
This method uses hardware to establish the priority of simultaneous interrupts. Deciding the interrupt priority includes the serial connection of all the devices that generate an interrupt signal. The devices are placed according to their priority such that the device having the highest priority gets placed first, followed by lower priority devices. The device with the lowest priority is found at last within the chain. In the daisy-chaining device, all devices are linked in serial form. The interrupt line request is not unusual to devices.
Even if one of the devices has an interrupt signal in the low-level state, the interrupt line goes to a low-level state and allows the interrupt input within the CPU. While there's no interrupt, the interrupt line remains in a high-level state. The CPU responds to the interrupt by allowing the interrupt acknowledge line. This signal is received via device '1' at its PI input. The acknowledge signal passes to the subsequent device through PO output if tool '1' isn't asking for an interrupt.
Parallel Priority Interrupt
The parallel priority interrupts method uses a register whose bits are set one after the other through the interrupt signal from every device. Priority is established in step with the position of the bits inside the register.
Along with the interrupt register, the circuit may add a mask register whose motive is to control the status of every interrupt(interrupt signal). The mask register could be programmed for disabling lower-priority interrupts even as a higher-priority device is being serviced. Even as a higher priority device is being serviced, lower priority interrupts are disabled by the programming mask register. It could also offer a facility that permits a high-priority device to interrupt the CPU simultaneously while a lower-priority device gets service. The figure above shows the logic for deciding priority among four interrupt source systems.
It includes an interrupt register whose individual bits are set through external conditions and cleared by program instructions. Being a high-speed device, the magnetic disk is given the highest priority. The printer has the next priority, accompanied via a character reader and a keyboard. The number of bits present in the mask register and interrupt register is the same.
Setting or resetting any bit within the mask register is feasible using software instructions. Each interrupts bit and its corresponding mask bit are carried out to produce the four inputs to a priority encoder. In this manner, an interrupt is recognized only if its corresponding mask bit is about 1 through the program.
Two bits of the vector address are transferred to the CPU, generated by the priority encoder. Other output from the encoder fixes the interrupt status flip-flop lST while an interrupt that isn't masked comes. The interrupt permit flip-flop lEN may be set or cleared using the program to offer an overall control over the interrupt system. The outputs of IST ANDed with IEN offer a common interrupt signal for the CPU. The interrupt acknowledges that the INTACK signal from the CPU permits the bus buffers present in the output register, and VAD, a vector address, is located into the data bus.
Polling - Software method
Polling is a software method. It is used to establish priority among interrupts occurring simultaneously. When the processor detects an interrupt in the polling method, it branches to an interrupt service routine whose job is to pull each Input/Output module to determine which module caused the interrupt.
The poll can be in the form of a different command line (For example, Test Input/Output). Here, the processor raises the Test input/output and puts the address of a specific I / O module in the address line. If there is an interrupt, the interrupt gets pointed.
Also, it is the order by which they are tested; that is, the order in which they appear in the address line or service routine determines the priority of every interrupt. Like, at the time of testing, devices with the highest priority get tested, then comes the turn of devices with lower priority. This is the easiest method for priority establishment on simultaneous interrupt. But the downside of polling is that it takes time.
Priority interrupts offer several advantages in managing the execution of tasks in a computer system. Here are five simple advantages:
Fast Response: Priority interrupts allow urgent tasks to be handled quickly, ensuring critical operations get immediate attention and reducing delays in essential processes.
Efficient Resource Allocation: They help allocate system resources to the most important tasks first, ensuring that high-priority tasks are completed without unnecessary waiting.
Real-time Processing: Priority interrupts are vital for time-sensitive applications like controlling machinery, as they guarantee that crucial tasks are executed promptly, maintaining smooth operations.
Multi-Tasking: With priorities, a computer can efficiently switch between multiple tasks, making it possible to handle various activities concurrently while ensuring that critical tasks are not ignored.
Optimized Performance: By focusing on high-priority tasks, the system's overall performance improves, as resources are directed where they're needed most, enhancing efficiency and responsiveness.
Disadvantages of Priority Interrupts
While priority interrupts have their advantages, they also come with several disadvantages. Here are five disadvantages of priority interrupts:
Priority Inversion: Priority inversion occurs when a lower-priority interrupt is allowed to preempt a higher-priority interrupt. This can lead to unexpected delays and disruptions in the system, as the higher-priority task is blocked by the lower-priority task.
Deadlocks: Priority interrupts can sometimes contribute to the creation of deadlock scenarios. Deadlocks occur when multiple tasks are waiting for resources that are held by other tasks in a circular manner. Priority inversions, combined with resource contention, can lead to situations where tasks with higher priority are waiting for resources held by tasks with lower priority, causing a deadlock to occur.
Unpredictable Timing: Priority interrupts can make the system's timing behavior unpredictable. Since the interrupt handling order is determined by the priority levels assigned to different interrupts, it can be challenging to predict when a particular interrupt will be serviced.
Complexity: Implementing priority interrupt systems can be more complex than other interrupt handling mechanisms. This complexity can increase the likelihood of errors and bugs in the system.
Resource Starvation: In a priority interrupt system, higher-priority interrupts can monopolize system resources, leaving lower-priority tasks with limited access to essential resources. This resource starvation can lead to unfair distribution of resources and can impact the overall system's performance and responsiveness.
Advantages of Daisy Chaining Priority - Hardware Method
The advantages of Daisy Chaining Priority - Hardware Method are:
Simple Implementation: Daisy chaining is a straightforward hardware-based method, making it relatively easy to implement.
Deterministic Priority: Priorities are established in a deterministic manner. Each device's position in the chain corresponds to its priority level.
Efficient Resource Utilization: Efficiently utilizes hardware resources as devices are only interrupted based on their priority levels.
Low Latency: Provides low latency for high-priority devices since they are given precedence in the daisy chain sequence.
Disadvantages of Daisy Chaining Priority - Hardware Method
The disadvantages of Daisy Chaining Priority - Hardware Method are:
Limited Scalability: Limited scalability for adding or removing devices without reconfiguring the entire daisy chain, making it less flexible for dynamic systems.
Propagation Delay: Longer chains introduce propagation delays, affecting the overall responsiveness of lower-priority devices.
Single Point of Failure: Susceptible to a single point of failure; if a device in the middle of the chain fails, it can disrupt the entire system.
Complexity with Equal Priority: Handling devices with equal priority levels can add complexity to the system.
Advantages of Software Polling Method
The advantages of Software Polling Method are:
Flexible Configuration: Software polling allows flexible configuration, making it adaptable to changing system requirements.
Equal Treatment for Devices: Treats all devices equally, avoiding priority conflicts and ensuring fair access to the CPU.
Dynamic System Changes: Easily accommodates dynamic changes in the system, such as adding or removing devices, without reconfiguring hardware.
No Daisy Chain Propagation Delay: Eliminates the propagation delay associated with daisy chaining, providing more consistent response times.
Disadvantages of Software Polling Method
The disadvantages of Software Polling Method are:
Higher CPU Overhead: Imposes higher CPU overhead due to continuous polling, potentially affecting the overall system performance.
Limited Responsiveness: May lead to limited responsiveness, especially for high-priority tasks, as the CPU needs to cycle through all devices during polling.
Complexity in Scheduling: Complex scheduling algorithms may be required for efficient device management and response time optimization.
Not Suitable for Real-Time Systems: Less suitable for real-time systems where precise and predictable timing is crucial, as software polling may introduce unpredictable delays.
Frequently Asked Questions
What is a parallel priority interrupt?
A parallel priority interrupt handles multiple interrupt requests simultaneously, assigning priority levels to determine which request is serviced first.
What is meant by priority of interrupts?
Priority of interrupts defines the order of execution when multiple interrupt requests occur, with higher-priority requests serviced before lower-priority ones.
What is VAD in daisy chaining?
VAD (Vector Address Detector) is a circuit that identifies which device in a daisy chain generates the interrupt and provides its vector address.
What are the four main types of interrupts?
The four main types of interrupts are Hardware Interrupts, Software Interrupts, Internal Interrupts, and External Interrupts, based on their source and trigger mechanism.
Conclusion
Priority interrupts play a crucial role in managing multiple interrupt requests efficiently in computer systems. Daisy chaining and software polling are two common methods used to prioritize and service interrupts. While daisy chaining follows a fixed priority order in hardware, software polling checks each device sequentially through software instructions.
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