Do you think IIT Guwahati certified course can help you in your career?
Introduction
There is something known as a system bus that connects the CPU, Input-Output processor, and memory (main components of a computer). In some cases, there exists a dispute in the system bus such that only one of the mentioned components can access it. The mechanism to solve this dispute is known as Interprocessor Arbitration.
This article will help you understand Interprocessor Arbitration, System Bus, Serial Arbitration Procedures, Parallel Arbitration Logic, and Dynamic Arbitration Algorithms in detail.
Interprocessor arbitration
Computer systems need buses to facilitate the transfer of information between their various components. There is a dispute in the system bus that connects the CPU, Input-Output processor, and memory (main components of a computer). Only one between the CPU, Input-Output processor, and memory gets the grant to use the bus simultaneously. Hence, an appropriate priority resolving mechanism is required to decide which processor should get control of the bus. Therefore, a mechanism is needed to handle multiple requests for the bus, known as Interprocessor Arbitration. The arbitration procedure services all processor requests based on established priorities.
Arbitration Techniques
The following are the techniques of arbitration:
Static Arbitration Techniques
In this technique, the priority assigned is fixed. It has two types. They are serial arbitration procedures and parallel arbitration logic.
Serial Arbitration
Serial (daisy-chain) arbitration
Source: https://knreddycse.weebly.com/
It is also known as Daisy chain Arbitration. It is obtained by the daisy-chain connection of bus arbitration circuits. The scheme got the term from the structure of the grant line, which chains through each device from the highest to lowest priority. The highest priority device will pass the grant line to the lower priority device only if it does not want it. Then the priority is forwarded to the next in the sequence. All devices use the same line for bus requests.If a busy bus line returns to its idle state, the most high-priority arbiter enables the busy line, and its corresponding processor can then run the required bus transfer.
Advantage
i) It is a simple design.
ii) Less number of control lines are used.
Disadvantage
i) Priority depends on the physical location of the device
ii) Propagation delay due to serially granting of bus
iii) Failure of one of the devices may fail the entire system
iv) Cannot assure fairness- a low-priority device may be locked out indefinitely
Parallel Arbitration
Parallel arbitration
Source:https://slideplayer.com/
It uses an external priority encoder and decoder. Each bus arbiter has a bus request output line and a bus acknowledge input line. Each arbiter enables request lines when its processor is requesting the system bus. The one with the highest priority determined by the output of the decoder gets access to the bus.
Dynamic Arbitration Techniques
Serial and Parallel bus arbitration are static since the priorities assigned are fixed. In dynamic arbitration, priorities of the system change while the system is in operation.
The various algorithms used are:-
Time Slice
It allocates a fixed-length time slice of bus time offered sequentially to each process in a round-robin fashion. The service provided by each system component and the system is independent of its location near the bus.
Polling
In polling, the controller generates the addresses for the devices. The number of address lines needed depends upon the number of connected devices to the system. The controller generates a sequence of device addresses in response to the bus request. When the requesting device recognizes its address, it activates the busy bus line and uses the bus. After several bus cycles, the polling process continues by choosing a different processor. The polling sequence usually is programmable, and as a result, the selection priority can be altered under program control.
Least Recently Used(LRU)
This algorithm provides the highest priority for a device, requesting that it has not used the bus for too long. The priorities are adjusted after several bus cycles according to the LRU algorithm.
FIFO(First IN First Out)
Requests are served in the order received in the FIFO scheme. The bus controller establishes a queue as per the request of the incoming bus to use this algorithm.
Each processor has to wait for its bus usage time as per first in and first-out (FIFO).
Rotating Daisy chain
It is a dynamic extension of the daisy chain algorithm. There is no central bus controller in this scheme, and the priority line is connected from the priority out of the last device back to the priority-in of the first device in a closed-loop.
Each arbiter priority for a given bus cycle is determined by its position along the bus priority line from the arbiter whose processor is currently controlling the bus. Once an arbiter releases the bus, it has the lowest priority.
Frequently Asked Questions
1. Name some of the algorithms used in Dynamic Arbitration Techniques.
Time slice, Polling, Least Recently Used(LRU), FIFO(First IN First Out), and Rotating Daisy chain are some of the algorithms used in Dynamic Arbitration Techniques.
2. What is a system bus?
A bus that can connect main components in a multi-processor system like CPUs, Input-Output processors, and memory is known as a system bus.
3. What kind of buses are used in Interprocessor Arbitration?
A single-bus arbiter is used in Interprocessor arbitration. This could be either a different DMS(Distribution Management System) controller or processor.
4. What is LRU in dynamic arbitration?
This algorithm provides the highest priority for a device, requesting that it has not used the bus for too long. The priorities are adjusted after several bus cycles according to the LRU algorithm.
5. State one disadvantage of serial arbitration.
Failure of one of the devices may fail the entire system is one disadvantage of serial arbitration.
Key Takeaways
In this article, we have extensively discussed the concepts of Interprocessor Arbitration, System Bus, Serial Arbitration Procedure, Parallel Arbitration Logic, Dynamic Arbitration Algorithms, and frequently asked questions.
16+ registered 
